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NXP Semiconductors /NeoM3 /ETHERNET /MADR

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Interpret as MADR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0REGADDR0RESERVED 0PHYADDR0RESERVED

Description

MII Mgmt Address register.

Fields

REGADDR

REGISTER ADDRESS. This field represents the 5-bit Register Address field of Mgmt cycles. Up to 32 registers can be accessed.
RESERVED

Unused
PHYADDR

PHY ADDRESS. This field represents the 5-bit PHY Address field of Mgmt cycles. Up to 31 PHYs can be addressed (0 is reserved).
RESERVED

Unused

Links

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data